Greg Gibeling

The goal of the RePar project is to explore tools and algorithms for synthesizing high quality hybrid systems from high level application descriptions. Using some novel abstractions we are able to combine research in reconfigurable and parallel computing, providing both productivity and performance for hardware development. Publications are forthcoming, as the project has been in stealth mode thus far. Please contact me for more information.

GateLib provides a necessary foundation for generating and testing this work.

GateLib is a library for hardware and software research, particularly in reconfigurable computing as evidenced by the primary use case: RePar. Consisting primarily of heavily parameterized and optimized Verilog, along with Java interfaces, GateLib has enabled several academic and corporate research projects. GateLib is actively supported and used, though it has seen very few changes as a result of being well tested and, for the current users, feature complete.

More soon...